Sau-Ching Wong
Patent drawing from US 6,259,627, Read and write operations using constant row line voltage and variable column line loadPatent drawing from US 6,259,627, Read and write operations using constant row line voltage and variable column line loadPatent drawing from US 6,259,627, Read and write operations using constant row line voltage and variable column line loadPatent drawing from US 6,259,627, Read and write operations using constant row line voltage and variable column line load

US 6,259,627

Read and write operations using constant row line voltage and variable column line load

Filed
January 27, 2000
Granted
July 10, 2001
Assignee
Samsung (MLM)
Inventors
Sau Ching Wong

Abstract

A read operation for a multi-level or a multi-bit-per-cell non-volatile memory biases a selected row line cell at a fixed voltage that is above the maximum possible threshold voltage representing data and changes the column line load for a selected column line. The column line load that corresponds to the trip-point of a sense amplifier indicates the data stored in the memory cell coupled to the selected row and column lines. A corresponding write process uses the same fixed row line voltage for both program and verify cycles. The programming voltage can be the same as the row line voltage for the read operation or can depend on the data value being written. To better control programming, the duration of the program cycles and/or the load on the drain or source of the selected memory cell during a program cycle varies with time and depends on the value being written. One memory in accordance with the invention includes variable column line loads for use during read and write operations. The variable loads can select the programming current for the write operation or the bias for the read operation according to a data value and/or a count. A counter generating the count for the variable loads can be used during a read operation to change the column line bias until the trip-point of a sense amplifier is found and during a write operation to reduce programming current when the threshold voltage of the selected memory cell nears the target threshold voltage level.

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