Sau-Ching Wong
Patent drawing from US 6,906,951, Bit line reference circuits for binary and multiple-bit-per-cell memoriesPatent drawing from US 6,906,951, Bit line reference circuits for binary and multiple-bit-per-cell memoriesPatent drawing from US 6,906,951, Bit line reference circuits for binary and multiple-bit-per-cell memoriesPatent drawing from US 6,906,951, Bit line reference circuits for binary and multiple-bit-per-cell memories

US 6,906,951

Bit line reference circuits for binary and multiple-bit-per-cell memories

Filed
June 14, 2002
Granted
June 14, 2005
Assignee
Samsung (MLM)
Inventors
Sau Ching Wong

Abstract

Auto-tracking bit line reference schemes generate a “½ cell current” reference by programming reference cells to threshold voltages that are between threshold voltage levels used to represent data. A common word line can control both a selected memory cell and a reference cell to provide a reference current, and differential sense amplifiers can compare a bit line current to reference currents to thereby distinguish data values. Current through other reference cells can be mirrored to pull-up devices to further improve the tracking of the reference line and bit line currents. Embodiments of the invention can be used with binary and multiple-bit-per-cell memories and with a variety of memory array architectures and memory cell structures.

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